ID:23200 EDA simulation disabled for this design.

CAUSE: Your design includes IP cores for which the Intel Quartus Prime cannot generate programming files. This is because you do not have a license for these cores. Of these cores, some do not support the Intel FPGA IP Evaluation Mode feature, so even time-limited programming files cannot be produced for this design. Others, however, do support the Intel FPGA IP Evaluation Mode feature. Because of this, the Intel Quartus Prime software cannot generate the files needed for EDA simulation of this design. The submessages of this message list the cores that do support Intel FPGA IP Evaluation Mode, causing simulation to be disabled.

ACTION: To reactivate the Intel Quartus Prime software to create files needed for EDA simulation, disable the Intel FPGA IP Evaluation Mode under Compilation Settings or More Compilation Settings.