IPC-40022: Reference Clock input of protocol IP not driven by top level clock ports

Description

Reference Clock input of protocol IP can be driven by top level clock port only.

Figure 1. Top level clock port driving reference clock pins of Protocol and System CLock IPs

Recommendation

Ensure that system clock inputs of protocol IPs are driven by top level clock port only.

Severity

Critical

Tags

Tag	Description
system	Design rule checks which validate full-system design.

Device Family

Agilex^®