ID:335091 The Timing Analyzer found <number of latches> latches that cannot be analyzed as synchronous elements. For more details, run the Check Timing command in the Timing Analyzer to see the list of unsupported latches.

CAUSE: The Timing Analyzer found latches across multiple look-up tables (LUTs), or latches that do not include an enable (e.g. SR latches). The Timing Analyzer does not support analyzing this latch implementation as a synchronous element, but treats these latches as a combinational loop.

ACTION: SR latches are not supported. Run the check_timing tcl command in the Timing Analyzer for a listing of unsupported SR latches. For latches spread over multiple LUTs, replace them with registers that use asynchronous load and data signals. Not all latches spread over multiple LUTs can be identified as possible latches.