ID:22828 EMIF system <EMIF name> has <Number of lanes current> gap lanes. EMIF systems with constrained pin assignments can have up to <Number of lanes allowed> gap lanes. Modify EMIF pin assignments to move EMIF lanes closer together to generate a valid EMIF system.

CAUSE: The EMIF system in this design is assigned to non-contiguous lanes with a gap that is too large.

ACTION: Modify EMIF pin assignments to move EMIF lanes closer together to generate a valid EMIF system. Refer to the External Memory Interfaces Intel FPGA IP User Guide for information about which banks and lanes are contiguous in different devices.