TMC-20217: Paths Failing Setup Analysis with Clock-As-Data

Description

Violations of this rule indicate setup-failing timing paths that use the same signal as both From Node and Launch Clock.

Parameters

Name Description Type Default Value Min Value Max Value
maximum_setup_slack Reports a violation for timing paths that have a setup slack below the value of this parameter. double 0.0    
to_clock_filter Reports a violation for timing paths that end at a register in a clock domain that matches the value of this parameter. string *    
minimum_number_of_adders Reports a violation for timing endpoints that are preceded by a number of independent adder chains greater than or equal to this value. integer 3    
minimum_number_of_soft_mult_chains Reports a violation for timing endpoints that are preceded by a number of independent adder chains that are implementing multiplier logic greater than or equal to this value. integer 2    

Recommendation

Restructure or reconstrain the path to capture the data safely.

Severity

Medium

Tags

Tag Description
nonstandard-timing Design rule checks related to topologies which have unique timing analysis methodologies and may prove problematic.

Device Family

  • Intel®Stratix® 10
  • Intel®Agilex™
  • Intel®Arria® 10
  • Intel®Cyclone® 10 GX