TMC-20022: Incomplete I/O Delay Assignment

Description

Violations of this rule identify ports with I/O delay assignments that don't have specifications for -reference_pin and -source_latency_included when the -clock specified is an internally targeted clock (not assigned to an input or output port).

Recommendation

Add the missing options to the delay assignment or modify the clock source to be a clock that is assigned to a top level input or output port.

Severity

High

Tags

Tag Description
sdc Design rule checks related to SDC validity checking.
system Design rule checks which validate full-system design.

Device Family

  • Intel®Cyclone® 10 GX
  • Intel®Arria® 10
  • Intel®Stratix® 10
  • Intel®Agilex™