The Intel® Stratix® FPGAs and SoC series combine high density and high performance with a rich feature to enable more functions and maximize system bandwidth, allowing customers to bring high-performance, state-of-the-art products to market faster with lower risk.
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Intel® Stratix® 10
Introduced in 2013, 14 nm Tri-Gate technology.
Stratix® V
Introduced in 2010, 28 nm technology.
Stratix® IV
Introduced in 2008, 40 nm technology.
Stratix® III
Introduced in 2006, 65 nm technology.
All Stratix® Generations
| Device Family | Intel® Stratix® 10 | Stratix® V |
Stratix® IV |
Stratix® III |
Stratix® II GX |
Stratix® II | Stratix® GX | Stratix® |
|---|---|---|---|---|---|---|---|---|
| Year of Introduction |
2013 | 2010 | 2008 | 2006 | 2005 | 2004 | 2003 | 2002 |
| Process Technology |
14 nm |
28 nm | 40 nm | 65 nm | 90 nm | 90 nm | 130 nm | 130 nm |
Intel® Stratix® Series Common Features
Both evolutionary and revolutionary features have been incorporated over the generations of Intel® Stratix® device families.
| Technology |
Intel® Stratix® 10 |
Stratix® V | Stratix® IV |
|---|---|---|---|
| Adaptive Logic Modules | ✓ | ✓ | ✓ |
| Transceivers | ✓ | ✓ | ✓ |
| Power | ✓ | ✓ | ✓ |
| DSP Blocks | ✓ | ✓ | ✓ |
| External Memory Interfaces | ✓ | ✓ | ✓ |
| Embedded Memory | ✓ | ✓ | ✓ |
| I/O Performance | ✓ | ✓ | ✓ |
| Design Security | ✓ | ✓ | ✓ |
| Single-Event Upset Mitigation | ✓ | ✓ | ✓ |
| Remote System Upgrades | ✓ | ✓ | ✓ |
| Partial Reconfiguration | ✓ |
✓ | |
| 3D Tri-Gate Transistor Technology | ✓ |
|
|
| Hard Processor System | ✓ |
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| Intel® Hyperflex™ FPGA Architecture | ✓ |
|
|
| Heterogeneous 3D Solutions (SRAM, DRAM, and ASICs) | ✓ |
|
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| Hard IEEE 754 Single Precision Floating Point | ✓ |
|
|
| AI Tensor Block | ✓ |
Related Products
Intel® Stratix® 10 NX FPGA
Intel® Stratix® 10 NX FPGA is an AI-optimized FPGA for high-bandwidth, low-latency artificial intelligence (AI) acceleration applications. The Intel® Stratix® 10 NX FPGA delivers accelerated AI compute solution through AI-optimized compute blocks with up to 143 INT8 TOPS at ~1 TOPS/W;1 in package 3D stacked HBM high-bandwidth DRAM; and up to 57.8G PAM4 transceivers.
Intel® Stratix® 10 DX FPGA
The first FPGA devices to support Intel® Ultra Path Interconnect (UPI) for direct coherent connection to future select Intel® Xeon® Scalable processor, and fully compliant PCIe Gen4 hard IP with up to x16 configuration at 16 GT/s and new memory controller to support select Intel® Optane™ DC persistent memory.
Intel® Stratix® 10 SoC FPGA
Combines a quad-core ARM Cortex-A53 MPCore* Hard Processor System (HPS) with industry-leading programmable logic technology.
Produkt- und Leistungsinformationen
Auf Basis interner Schätzwerte von Intel.
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