Produkt- und Leistungsinformationen

1Vergleich basierend auf PCIe* Gen. 3 im Vergleich zu PCIe* Gen. 4, theoretische Spitzenleistung, basierend auf PCI-SIG-Spezifikationen.
2

Comparison based on Stratix® V vs. Intel® Stratix® 10 using Intel® Quartus® Prime Pro 16.1 Early Beta. Stratix® V Designs were optimized using 3 step optimization process of Hyper-Retiming, Hyper-Pipelining, and Hyper-Optimization in order to utilize Intel® Stratix® 10 architecture enhancements of distributed registers in core fabric. Designs were analyzed using Intel® Quartus® Prime Pro Fast Forward Compile performance exploration tool. For more details, refer to Intel® Hyperflex™ FPGA Architecture Overview White Paper: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01220-hyperflex-architecture-fpga-socs.pdf. Actual performance users will achieve varies based on level of design optimization applied. Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.de/benchmarks.

3Intel® Stratix® 10 DX FPGA UPI vs. PCIe *, geschätzte Roundtrip-Latenz, basierend auf internen Intel Schätzungen.