Mobile Intel® Pentium® 4 Processor with 533 MHz FSB: Datasheet
The mobile Intel® Pentium® 4 processor with 533 MHz FSB is based on the Intel NetBurst® micro-architecture. The mobile Intel Pentium 4 processor with 533-MHz FSB utilizes a 478-pin Flip-Chip Pin Grid Array (FC-PGA2) package with an integrated heat spreader, and plugs into a surface-mount, Zero Insertion Force (ZIF) socket. The mobile Intel Pentium 4 processor maintains full compatibility with IA-32 software. In this document, the mobile Intel Pentium 4 processor with 533 MHz FSB will be referred to as the “mobile Intel Pentium 4 processor with 533 MHz FSB”, or “mobile Intel Pentium 4 processor”, or simply “the processor”.
The mobile Intel Pentium 4 processor with 533 MHz FSB supports Intel® Hyper-Threading Technology (Intel® HT Technology), which allows a single, physical processor to function as two logical processors. While some execution resources such as caches, execution units, and buses are shared, each logical processor has its own architecture state with its own set of general-purpose registers, control registers to provide increased system responsiveness in multitasking environments, and headroom for next generation multithreaded applications. Intel recommends enabling Intel HT Technology with Microsoft Windows* XP Professional or Windows* XP Home, and disabling Intel HT Technology via the BIOS for all previous versions of Windows operating systems. For more information on Intel HT Technology, see www.intel.com/info/hyperthreading. Refer to Section 7.1 for Intel HT Technology configuration details.
The Intel NetBurst micro-architecture features include hyper-pipelined technology, a rapid execution engine, a 533-MHz FSB, and an execution trace cache. The hyper pipelined technology doubles the pipeline depth in the mobile Intel Pentium 4 processor allowing the processor to reach much higher core frequencies. The rapid execution engine allows the two integer ALUs in the processor to run at twice the core frequency, which allows many integer instructions to execute in 1/2 clock tick. The 533-MHz FSB is a quad-pumped bus running off a 133-MHz system clock making 4.3 GB/sec data transfer rates possible. The execution trace cache is a first level cache that stores approximately 12-k decoded micro-operations, which removes the instruction decoding logic from the main execution path, thereby increasing performance.
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